Abstract: Technological advances in silicon fabrication has feature sizes of transistors as small as 17mm and expected to reach 7nm by 2017. This enables packaging more functionality on a single device. Smaller transistor geometries mean faster rise time devices. For Optimized power dissipation, these devices need to operate at lower voltage. Faster devices and low operating voltages are the genesis of signal integrity and power integrity issues in digital circuits. This paper presents an overview of these aspects of digital system design